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Posted by Richard Fichera on May 19, 2013
Background — High Performance Attached Processors Handicapped By Architecture
The application of high-performance accelerators, notably GPUs, GPGPUs (APUs in AMD terminology) to a variety of computing problems has blossomed over the last decade, resulting in ever more affordable compute power for both horizon and mundane problems, along with growing revenue streams for a growing industry ecosystem. Adding heat to an already active mix, Intel’s Xeon Phi accelerators, the most recent addition to the GPU ecosystem, have the potential to speed adoption even further due to hoped-for synergies generated by the immense universe of x86 code that could potentially run on the Xeon Phi cores.
However, despite any potential synergies, GPUs (I will use this term generically to refer to all forms of these attached accelerators as they currently exist in the market) suffer from a fundamental architectural problem — they are very distant, in terms of latency, from the main scalar system memory and are not part of the coherent memory domain. This in turn has major impacts on performance, cost, design of the GPUs, and the structure of the algorithms:
Over the last few months, AMD has been quietly rolling out a new technology, heterogeneous Uniform Memory Access (hUMA), to be implemented on future unannounced AMD products. hUMA will fundamentally alter the relationship of the GPU to the main system CPU by providing the GPU with peer access to the main system memory space along with the scalar processor. The key technical features of hUMA will include:
The potential impact on CPU/GPU integration is immense. As an embryonic developer I wrote significant code on real-memory systems where a considerable amount of my time was spent juggling overlays of data and code that were locked to physical memory, and the transition to a uniform virtualized memory model transformed programming. While hUMA will still require explicitly exposing parallelism in algorithms, it will remove an unnecessary and inconvenient barrier to its proper exploitation.
Where Are The Products?
Today there are no hUMA products, but with the pacing of AMD’s communications and the expectation of new processor generations from both AMD and Intel, my guess is that we will hear from AMD on the subject of hUMA products before the year is out. Because there is currently also little or no hUMA software IP, we can probably expect that the initial products will be in the server space targeted at lab and HPC users, along with a push to promote hUMA software IP. Since AMD’s server market has fallen to less than 5% according to some observers, AMD has little to lose by trying to shake up the server market again. Consider also that AMD has an architecture license for ARM, so there is also the potential to cook up some interesting mixes of very low power scalar ARM cores hUMA-coupled with GPUs in addition to hUMA-based variations of current AMD APU designs.
What Are The Risks?
As always, with new technologies, there are risks. For hUMA as a catalyst for increasing AMD’s market share, the risks are pretty straightforward:
From a developer's perspective, hUMA resonates with overtones of Victor Hugo’s “nothing is stronger than an idea whose time has come” (this is actually a popular paraphrasing, not a literal translation). If you are even peripherally involved in high-performance computing, this is a development that you should be tracking very closely, and when the products become available, get one and start developing — you could be on the forefront of a major sea change in parallel application development.
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